Most modern processors use branch prediction mechanisms to improve performance. While highly-accurate branch prediction can boost the processor performance considerably, branch misprediction may cause significant degradation in latency and efficiency.
Various techniques have been suggested for improving the performance of branch prediction, or to reduce the impact of branch misprediction. For example, the IBM POWER8™ processor is capable of eliminating some conditional branches that skip over a single instruction. When a conditional branch is followed by certain fixed-point or store instructions, the second instruction can be converted into a predicated operation to eliminate branch processing, including any possible mispredictions. This “instruction fusing” feature is described by Sinharoy et al., in “IBM POWER8 processor core microarchitecture,” IBM Journal of Research and Development, volume 59, issue 1, January, 2015.